With the improvement in semiconductor technology, the electronic industry is constantly introducing slim and light products combined with many functions, such as a smart phone including the functions of, for instance, a touch panel and wireless network. The numerous functions are mainly computed by an IC chip, wherein the running time for computing and responding decides the consumer's speed of using the products. The speed of response is a relatively important requirement for the modern society with an accelerated pace of life. Therefore, it is very important to be able to determine whether an IC chip is still a satisfactory product after going through hundreds of semiconductor processes such as design, photomask, wafer production, packaging, and testing.
The devices on a wafer are traditionally cut first and then packaged. The current wafer packaging and testing technology has developed the wafer level chip scale package (WLCSP). In WLCSP, a solder ball is first directly laid on the wafer for packaging, and then the wafer is cut into a plurality of IC die. The main difference between the two is the control of the IC test frequency. Test frequency can be adjusted in the former, but not the latter. In this case, for the higher frequency devices, the test difficulty is relatively higher because the resistance generated by the increase in frequency during IC signal testing is relatively higher, and therefore the accuracy of the test is lower, and the test may not even be performed. Moreover, adhesion readily occurs between the current metal probe and a solder ball during the testing process, thereby lowering conductivity. Furthermore, high test frequency readily causes wear of the tip of the probe, thereby reducing the service life of the probe. Therefore, a probe with a long service life and high test reliability is needed to reduce the cost of the semiconductor packaging and testing industry.